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432 core Occamy RISC-V chip has been streamed: equipped with 32GB HBM2E memory

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Update time : 2023-05-10 09:29:39
        On May 9th, it was reported that the Occamy processor, supported by the European Space Agency and developed by engineers from the Federal Institute of Technology in Zurich and the University of Bologna, has now been taped. It uses two 216 32-bit RISC-V core chiplets, an unknown number of 64 bit FPUs, and two 16GB HBM2e memory from Micron.
 
 
        The core of this processor is interconnected through an intermediate layer, and a dual CPU can provide 0.75 FP64 TFLOPS performance and 6 FP8 TFLOPS computing power.
        The European Space Agency and its development partners did not disclose the power consumption of Occamy, but it is said that the chip uses passive cooling, which means it may be a low-power processor.
        One of the advantages of small chip design is that it can also add other small chips to the package in the future to accelerate certain workloads when needed. Each Occamy chip has 216 RISC-V cores and FPUs for matrix operations, with a total of approximately 1 billion transistors distributed on these 73mm2 small chips, manufactured based on lattice 14LPP.
        As a comparison, the Intel Alder Lake chip size is 163 mm2. In terms of performance, the Nvidia A30 GPU has 24GB HBM2 graphics memory and can provide Tensor TFLOPS of 5.2 FP64/10.3 FP64, as well as 330/660 (sparsity) INT8 TOPS.
        According to public sources, the Occamy CPU was mainly developed as part of the European Space Agency's EuPilot program and is one of the many chips that ESA is considering for space computing.
        It is reported that Occamy can perform simulation operations on FPGA, and this implementation has been tested on two AMD Xilinx Virtex UltraScale+HBM FPGAs and Virtex UltraScale+VCU1525 FPGAs.

 
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