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Intel Announces First Agilex 7 FPGA R-Tile to Support PCIe 5.0 and CXL Capabilities

Update time : 2023-05-26 10:36:11

Intel's Programmable Solutions Division announced that volume deliveries of the Intel Agilex 7 R-tile, which meets volume production requirements, are underway. The device is the first FPGA with PCIe 5.0 and CXL capabilities, and the FPGA is the only one with the hardened intellectual property (IP) required to support these interfaces.

Intel helps customers accelerate workloads with seamless integration and high-bandwidth processor interfaces
Customers need cutting-edge technology to deliver the scalability and customization they need to not only effectively manage their current workloads, but also to adapt functionality as their needs change," said Shannon Poulin, vice president and general manager, Programmable Solutions Division, Intel Corporation. Intel Agilex products support programmable innovation with the speed, power and functionality customers need, while providing flexibility and resilience for their future growth. For example, customers are using R-Tile with PCIe 5.0 and CXL capabilities to accelerate software and data analytics, reducing processing times from hours to minutes."
Faced with the constraints imposed by time, budget and power consumption, organisations across industries including data centres, telecommunications and financial services are looking to FPGAs as a flexible, programmable, and efficient solution. With the Agilex 7 R-Tile, customers can seamlessly interface FPGAs with, for example, fourth-generation Intel Xeon Scalable processors and accelerate targeted data centre and scientific computing workloads with processor interfaces featuring the highest bandwidth available. the configurable and scalable architecture of the Agilex 7 enables customers to rapidly deploy customised technology, i.e., based on their specific needs, to hardware to accelerate deployment at scale, reduce overall design costs, shorten the development process and accelerate implementation for optimal data centre performance.
Agilex 7 R-Tile FPGAs offer leading-edge technology capabilities. It delivers up to 2x faster PCIe 5.0 bandwidth per port and up to 4x higher CXL bandwidth than other FPGA products. According to a white paper published by Meta and the University of Michigan, adding FPGAs with CXL memory to servers based on 4th generation Intel Xeon Scalable processors, along with efficient memory page management technology through Transparent Page Placement (TPP), can increase Linux performance by up to 18 percent. In addition, UnifabriX demonstrated its CXL-enabled smart memory nodes in multiple performance benchmarks, while one test showed a 28% increase in HPCG (High Performance Conjugate Gradient) benchmark scores by doubling the number of 4th generation Xeon Scalable processor cores available when processing scientific computing workloads.

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