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Intel plans to develop 14A and 10A processes: High-NA EUV lithography technology will be used

Update time : 2023-02-13 15:51:58

At the "Intel Accelerated Innovation: Process Technology and Packaging Technology Online Conference" in July 2021, Intel CEO Pat Gelsinger demonstrated a series of underlying technological innovations. According to Intel's plan, Intel 7, Intel 4, Intel 3, Intel 20A and Intel 18A processes will be released by 2025, and Intel 7 has been applied to Alder Lake and Raptor Lake.

Intel 4 is the original 7nm process. This process node uses EUV lithography technology, which can use ultra-short wavelength light to print extremely small patterns, improve the performance of about 20% per watt and improve the chip area. It can apply the next generation of Foveros and EMI B packaging technology, which will appear in Meteor Lake and Granite Rapids. It is expected to be put into production in the second half of 2022, and relevant products will be shipped in 2023. With the further optimization of FinFET and the increased use of EUV in more processes, Intel 3 has achieved about 18% improvement in performance per watt compared with Intel 4, and will be ready for production in the second half of 2023.
By the time of the Intel 20A and Intel 18A processes, the Emmy era will be opened with the help of two breakthrough technologies, RibbonFET and PowerVia. RibbonFET is the implementation of Gate All Around transistor, which will become the first new transistor architecture since Intel launched FinFET in 2011. This technology accelerates the switching speed of the transistor and achieves the same driving current as the multi-fin structure, but it takes less space. PowerVia is Intel's unique and the industry's first back power transmission network. It optimizes signal transmission by eliminating the need for front power supply and wiring of the wafer.
According to the report of Wccftech, the information released by IMEC shows that Intel 18A process is followed by Intel 14A process, which is expected to appear in 2026, followed by Intel 10A process, and the time point is 2028. At the "Samsung Foundry Forum 2022" last year, Samsung announced its future technology roadmap, showing that its 1.4nm process is expected to be mass produced in 2027. As the leader of current semiconductor technology, it is rumored that TSMC also established a research and development team of 1.4nm manufacturing technology last year. At present, TSMC, Samsung and Intel all have plans for 1.4nm process, and the mass production time is probably between 2026 and 2027.
New lithography equipment will also be introduced in 2025 and beyond. Intel took the lead in purchasing the industry's first TWINSCAN EXE: 5200 system last year. This is an extremely ultraviolet (EUV) mass production system of ASML with high numerical aperture (High-NA) and more than 200 wafers per hour. It is understood that Intel will introduce High-NA EUV technology in the Intel 18A process. Last year, it was reported that TSMC plans to introduce the High-NA EUV lithography machine in 2024, which will be used in the manufacture of 2nm chips. After the semiconductor technology enters the 2nm era, High-NA EUV technology should be gradually adopted to replace the existing EUV technology.
According to Martin van den Brink, the chief technology officer of ASML, the High-NA EUV lithography opportunity consumes more power than the existing EUV lithography machine, increasing from 1.5 MW to 2 MW. The main reason is that High-NA uses the same light source, which requires an additional 0.5 megawatt, and ASML also uses water-cooled copper wire to power it. High-NA EUV system will provide 0.55 numerical aperture. Compared with the previous EUV system equipped with 0.33 numerical aperture lens, the accuracy will be improved, and higher resolution patterning can be achieved to achieve smaller transistor characteristics.
In addition, the price of the new generation lithography machine is also amazing, which will increase from US $150 million of EUV lithography machine to more than US $400 million.

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