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Intel returns to storage after 38 years, joins three national labs to develop DRAM memory technology

Update time : 2023-01-07 10:10:51

Intel actually started out as a DRAM memory company, and for a time was a pioneer in storage semiconductor technology, successfully building the world's first commercially available 1K Bit pMOS DRAM, the Intel 1103, in 1970, but announced its withdrawal from the field in 1984, following the rise of Japanese manufacturers.

For example, at IDF 2015, the company announced that it was working with Micron on 3D XPoint technology, and that it was devoting its efforts to NAND Flash and the development of Optane drives, although it sold the business within a few years.
Intel's subsidiary, Intel Federal LLC, was commissioned by the US Department of Energy to develop a new memory technology for Sandia National Laboratories. The technology is described as part of the US AMT Advanced Memory Technology, which is mainly used in supercomputing and is designed to accelerate simulation and computing applications.
There is no definitive information on this new DRAM technology, but several technologies have been selected and overall appear to be very powerful, up to 40 times more effective than those used in Sandia Labs' upcoming NNSA supercomputer.
The project, which is funded by the National Nuclear Security Administration's Advanced Simulation and Computing Program in collaboration with Sandia, Los Alamos and Lawrence Livermore national laboratories, is described as part of the NNSA's post-trillion sub-computing program portfolio, whose goal is to maintain the momentum of technology development and to improve the US industry's competitiveness in next-generation high-performance computing technologies through the close collaboration with industry initiated by its PathForward programme Its goal is to maintain the momentum of technology development and to foster a stronger domestic HPC ecosystem through close collaboration with industry initiated by its PathForward program.

"This work will focus on improving the bandwidth and latency characteristics of future memory systems, which will have a direct impact on application performance for a variety of ASC task codes," said James H. Laros III, Sandia project leader.

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